French cluster Minalogic strengthens ASTEERICS with commercialization lead

Minalogic, the French digital technology cluster for microelectronics, photonics and software, has appointed Philippe Flatresse as Director of Valorization for ASTEERICS. The appointment strengthens the French microelectronics competence center’s role in moving semiconductor innovation toward industrial deployment within the European Chips Act framework.

Strengthening the link between R&D and industrialization

Minalogic has appointed Philippe Flatresse as Director of Valorization for ASTEERICS. The move comes at a time when semiconductor capabilities are increasingly tied to Europe’s technological autonomy.

ASTEERICS operates within the European Chips Joint Undertaking, an EU-backed initiative supporting semiconductor innovation and industrialization across Europe, and is also supported by the French government under the France 2030 program. Its objective is to convert deeptech expertise into industrial applications, particularly in energy-efficient integrated circuits.

Flatresse brings both technical and commercial experience. Holding a PhD in microelectronics from Grenoble INP and trained at CEA-Leti, he spent 18 years at STMicroelectronics working on the global deployment of FD-SOI technologies. Subsequent roles at Soitec and Dolphin Design expanded his focus to marketing and business development in sectors including AI, automotive, and IoT.

Role focused on scaling semiconductor innovation

Within ASTEERICS, Flatresse is tasked with supporting partners in maturing their projects toward industrial readiness. This includes transforming concepts into manufacturable integrated circuits and securing growth pathways for companies across the ecosystem.

His role also involves coordination at the European level, including leading a dedicated working group on semiconductor technologies in collaboration with other competence centers. This reflects the broader objective of aligning national initiatives with European semiconductor strategies.

The appointment is structured as a secondment from Soitec, highlighting collaboration within the French microelectronics ecosystem.

ASTEERICS as a national entry point for semiconductor adoption

Launched in early 2026, ASTEERICS serves as a central access point for companies seeking to develop or integrate semiconductor technologies. The initiative targets startups, SMEs, mid-sized firms, and large enterprises working on ASIC, ASSP, FPGA, MEMS, or photonic integrated circuits.

The center operates as a distributed network rather than a single physical site. It connects companies with European resources such as pilot lines, design platforms, and manufacturing partners. Key technology areas include FD-SOI, GaN, and SiC, which are relevant for energy-efficient and high-performance applications.

ASTEERICS also provides training, techno-economic consulting, and support in accessing funding and infrastructure. The goal is to reduce barriers to semiconductor adoption, particularly for companies lacking in-house expertise or access to industrial capabilities.

Relevance for IoT and system integration

For system integrators and solution providers, ASTEERICS addresses a critical bottleneck: the transition from system-level innovation to custom semiconductor integration. Access to tailored IC design and manufacturing can improve performance, energy efficiency, and differentiation in IoT solutions.

By aligning technical development with market requirements, the initiative supports the creation of application-specific hardware for sectors such as industrial IoT, automotive systems, and AI-enabled edge devices.